DWMC-16: Initial Instruction Set - Deprecated
With some of the basics out of the way, I think I can now deal with an initial instruction set for the computer. I plan to do a somewhat minimal instruction set, but I do not think I will be able to keep it at less than 32 instructions as 'Minimal Instruction Set Computing' requires.
Legend¶
| Rd | Destination Register |
|---|---|
| Rs, Rs2 | Source Registers |
| PR | Program Counter |
| C | Constant Number |
| Addr | Memory Address |
| ST | Stack Pointer |
| F | Flag bit |
| MSB | Most Significant Bit |
| LSB | Least Significent Bit |
Data Transfer Operations¶
Load Direct/Indirect¶
| Load Direct | ld Rd, Addr | Rd <= Memory[Addr] |
| Load Indirect | ldi Rd | Rd <= Memory[Z] |
Effected Flags: None
These operations load a value from memory, either directly by giving the address or indirectly from the Z Address Register. The latter necessitates an Adress to be saved in the Z register.
Store Direct/Indirect¶
| Store Direct | st Rs, Addr | Memory[Addr] <= Rs |
| Store Indirect | sti Rs | Memory[Z] <= Rs |
Effected Flags: None
These operations store a value to memory, either directly by giving the address or indirectly from the Z Address Register. The latter necessitates an Adress to be saved in the Z register.
Move¶
| Move | mv Rd, Rs | Rd <= Rs |
Effected Flags: None
This operation copies the value of Register Rs into Register Rd.
Arythmic Logical Operations¶
Arythmic Operations¶
| Add | add Rd, Rs | Rd <= Rd + Rs |
| Increment | inc Rd | Rd <= Rd + 1 |
| Substract | sub Rd, Rs | Rd <= Rd - Rs |
| Decrement | dec Rd | Rd <= Rd - 1 |
Effected Flags: C, QC, HC, TC, Z, N, O
These operations add/subtract the Source register to/from the Destination Register.
Logical Operations¶
| Bitwise AND | and Rd, Rs | Rd <= Rd & Rs |
| Bitwise OR | or Rd, Rs | Rd <= Rd | Rs |
| Bitwise XOR | xor Rd, Rs | Rd <= Rd ^ Rs |
| Bitwise NOT | not Rd | Rd <= ~Rd |
Effected Flags: Z
Shift Operations¶
| Logical Shift Left | lsl Rd | Rd <= Rd << 1 LSB <= Carry Carry <= MSB |
| Logical Shift Right | lsr Rd | Rd <= Rd >> 1 MSB <= Carry Carry <= LSB |
| Logical Rotate Left | lrl Rd | Rd <= Rd << 1 LSB <= MSB |
| Logical Rotate Right | lrr Rd | Rd <= Rd >> 1 MSB <= LSB |
Effected Flags: C, Z
These operations logically shift/rotate the binary value of the Destination Register by one bit left/right.
Conditional Branch Instructions¶
Simple Branch Operations¶
| Branch if Flag | bz F, Addr | if (F == 0): PC <= Addr |
| Branch if not Flag | bnz F, Addr | if (F != 0): PC <= Addr |
Effected Flags: None
These operations are simple branch instructions to test whether a previous operation set/reset a flag. The flag itself should be designated by its bit.
Complex Branch Operations, Single Register¶
| Branch if Zero, Decrement | bzd Rd, Addr | if (Rd == 0): PC <= Addr else Rd <= Rd - 1 |
| Branch if not Zero, Decrement | bnzd Rd, Addr | if (Rd != 0): PC <= Addr else Rd <= Rd - 1 |
| ||
|
Effected Flags: C, Z, N
These operations are more complex branch operations, testing a single register. The Branch, Decrement operation is specially meant for counting loops, which are rather important in computing.
EDIT: brz/brnz Rs, Addr can be replaced by breq/brnw Rs, Zero, Addr.
Complex Branch Operations, Two Registers¶
| Branch if Registers Equal | breq Rs, Rs2, Addr | if (Rs == Rs2): PC <= Addr |
| Branch if Registers not Equal | brne Rs, Rs2, Addr | if (Rs != Rs2): PC <= Addr |
| Branch if greater then | bgt Rs, Rs2, Addr | if (Rs > Rs2): PC <= Addr |
| ||
| Branch if greater then or equal | bge Rs, Rs2, Addr | if (Rs >= Rs2): PC <= Addr |
|
Effected Flags: C, Z, N
These operations are more complex branch operations, comparing the value of two registers.
EDIT: blt/ble Rs, Rs2, Addr can be replaced by bgt/bge Rs2, Rs, Addr.
Other Operations¶
Unconditional Jump Operations¶
| Jump Direct | jmp Addr | PC <= Addr |
| Jump Indirect | jmpi | PC <= Z |
| Jump to Subroutine | jms Addr | ST <= PC + 1; PC <= Addr |
| Return | ret | PC <= ST |
Effected Flags: None
These operations are for jumping through the program. For the jump to a subroutine and the return, the Stack Pointer is automatically incremented/decremented.
Stack Operations¶
| Push to Stack | push Rs | ST <= Rs |
| Pop from Stack | pop Rd | Rd <= ST |
Effected Flags: None
These operations are meant for storing/loading values to/from the stack.
Flag Operations¶
| Set Flag | sf F | F <= 1 |
| Reset Flag | rf F | F <= 0 |
Effected Flags: Any
These operations are meant for setting/resetting any flag.
Other Operations¶
| No operation | nop | No operation |
Effected Flags: None
Conclusions¶
With currently 38 34 operations in the Instruction Set, with a clear majority being branch operations.
This may or may not be the final iteration of the Instruction set, but it is certainly a beginning, and I'm going to use it to begin to work on the control logic of the CPU. Most likely, I will use a full microcode system, which would make adding more operations later on relatively simple.