While I am thinking about the Memory Addressing Modes, I noticed that that if I am to use Relative Addressing, that is an address relative to the Program Counter, I may need to add a PC Offset Register in the Special Use Register Block. So I had to modify the basic design a little to add this new register.
This is the general design for the IO systems used by the DWMC-16.
As the IO System is mapped into a sector in memory, it does share the same subdivision into 4 kiWord memory blocks, with each block of memory used to address one IO module.
This section is about the design of the Memory System of the DWMC-16. It will discuss the Memory, the DMA Controller and the Memory Management Unit.
Well... It seems that I have forgotten to add a few things to the ALU that should be part of it... oops...
The Control Logic of the DWMC-16 is a microcode based state machine Control Logic, using a reprogrammable microcode instruction memory to save the microcode instructions to save the micro instructions used for the state machine.